Job Listing Description

THIS JOB IS NO LONGER AVAILABLE. THIS IS ARCHIVAL INFORMATION.
Engineer II - FPGA Verification

Description:
Engineer II – FPGA Verification
Location: Westminster, CO
Duration: 6 months contract to hire
Openings for Level II and Principal Engineer
Description:

•Verify designs (including SOC architectures utilizing soft-core processors, digital filters, image processing algorithms, and communication interfaces/protocols), design and implement test benches and test plans for both chip-level and system level environments and create reusable verification environments that can be used across multiple projects.

•Work in System Verilog/UVM environment platform and be responsible for generating FPGA verification plan, verification matrix and coming up with verification environments for test and verification of flight FPGA code/modules.

•Work collaboratively and in tandem with FPGA design engineers and embedded software engineers.

•Span the gap between FPGA system verification and embedded software development.

•Establish and maintain effective working relationships within the department, the Strategic Business Units, Strategic Support Units and the Company. Interact appropriately with others in order to maintain a positive and productive work environment.
Requirements:

•BS degree or higher in Engineering or a related technical field is required plus 5 or more years of related experience.

•Ability to own entire test bench, create environment from scratch, and set up whole simulation environment.

•Proficiency with Modelism/Questa tools sets

•Each higher-level degree, i.e., Master’s Degree or Ph.D., may substitute for two years of experience. Related technical experience may be considered in lieu of education. Degree must be from a university, college, or school which is accredited by an agency recognized by the US Secretary of Education, US Department of Education.

•Strong Verification development methodology and test-benching for FPGAs.

•Strong software engineering skills, experience with System Verilog and OVM/UVM, C/C++, object-oriented design, and familiarity with electronic circuit design and electronic systems.

•A solid understanding of object-oriented concepts and experience designing class-based constrained random testbenches.

•Experience with Xilinx Vivado is a plus.

•Knowledge and experience with Windows, Unix and scripting languages (e.g. Ruby, Python, TCL) is a plus.

•Experience in documentation and verification of high-speed digital electronics, FPGAs, and embedded processor systems is desired.

•Ability to develop specifications, cost, schedule, and resource requirements for FPGA or ASIC verification plans.

•Military experience and/or ability to get a security clearance highly desired, but not required.
 
Job Location: Westminster, CO
Rate: DOE
Per Diem: Possible Split
Overtime: No
Duration: 6 month contract to hire
Start Date: ASAP
Input Date: 10/26/2018
Firm Name: ALLEGIANCE CONSULTING INC
Attention: Paulina Villagomez
Address: 10822 W TOLLER DR STE 250
City, State: LITTLETON, CO 80127
Phone: 720/947-9208
Website: www.acinow.net

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